The dimensions required in ultra-large-scale integrated circuits (ULSIs) for circuit element formation are extremely small, on the order of 0.5 .mu.m. With wet etching, fine patterning of this kind involves forming a resist film in the prescribed pattern on the surface of the layer to be patterned. During the etching process, isotropic etching characteristics are exhibited. Thus, undercutting in the width direction takes place simultaneous with etching in the depth direction. Therefore it is difficult to obtain the desired dimensions. This method is therefore not suitable. In contrast, with dry etching, the amount of etching in the width direction is very small compared to the amount of etching in the width direction on the layer to be patterned. Therefore this is highly suitable for fine patterning such as that described above.
However, with dry etching, as the etching process progresses a residue (hereinafter referred to as "polymer residue" or "polymer residue layer") is created and deposited in the etched areas, containing components of the gas used in the etching process, structural components of the patterned layer (including the resist), and metal components (e.g., iron, chromium, and nickel as possible components) from structural parts of the etching equipment. This polymer residue layer cannot be removed by conventional plasma ashing [transliteration] or mixtures of sulfuric acid and hydrogen peroxide-water (these cleaners are used to remove organic contaminants and generally consist of a 3:1 mixture of concentrated sulfuric acid and 30% hydrogen peroxide-water). The presence of the polymer residue results in problems such as the following.
(1) As illustrated in FIG. 13, when a polymer residue layer 9 is formed on the side walls of a contact hole 92a on a BPSG (silicate glass doped with boron and phosphorous) 92, the area of contact between the silicon substrate 91 and the contact 93a on the wire 93 is reduced, causing an increase in the contact resistance. In addition, the contact 93a is connected to the substrate 91 through the polymer residue layer 9 as indicated by the broken-line arrow. This causes changes in the resistance.
(2) It becomes more difficult to adhere wiring materials to the insulating layer.
(3) The insulation provided by the interlayer insulating layer becomes unreliable.
(4) In addition to reduced reliability in the semiconductor devices of the final product, if the polymer residue layer contains metal components, they may contaminate production facilities, such as electric furnaces or cleaning equipment, in steps after patterning.
The present invention has been developed in light of the conditions described above, and has the objective of providing an ultrafine-pitch-patterned semiconductor device fabrication method and a treating liquid used with that method, whereby the undesirable polymer residue layer is removed to ensure good, stabilized electrical characteristics.